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100323 Low Power Hex Bus Driver
July 1988 Revised August 2000
100323 Low Power Hex Bus Driver
General Description
The 100323 is a monolithic device containing six bus drivers capable of driving terminated lines with terminations as low as 25. To reduce crosstalk, each output has its own respective ground connection. Transition times were designed to be longer than on other F100K devices. The driver itself performs the positive logic AND of a data input (D1-D6) and the OR of two select inputs (E and either DE1, DE2, or DE3). Enabling of data is possible in multiples of two, i.e., 2, 4 or all 6 paths. All inputs have 50 k pull-down resistors. The output voltage LOW level is designed to be more negative than normal ECL outputs (cut off state). This allows an emitter-follower output transistor to turn OFF when the termination supply is -2.0V and thus present a high impedance to the data bus.
Features
s 50% power reduction of the 100123 s 2000V ESD protection s -4.2V to -5.7V operating range s Drives 25 load
Ordering Code:
Order Number 100323PC 100323QC Package Number N24E V28A Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names D1-D6 DE1-DE3 E O1-O6 Data Inputs Dual Enable Inputs Common Enable Input Data Outputs 28-Pin PLCC Description
(c) 2000 Fairchild Semiconductor Corporation
DS009877
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100323
Truth Table
E L X X X X H H H H
H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Cutoff = Lower-than-LOW State
DEn L H H H H X X X X
Dn X L L H H L L H H
Dn+1 X L H L H L H L H
On Cutoff Cutoff Cutoff H H Cutoff Cutoff H H
On+1 Cutoff Cutoff H Cutoff H Cutoff H Cutoff H
Logic Diagram
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100323
Absolute Maximum Ratings(Note 1)
Storage Temperature Maximum Junction Temperature VEE Pin Potential to Ground Pin Input Voltage (DC) Output Current (DC Output High) ESD
-65C to +150C +150C -7.0V to +0.5V
VEE to +0.5V
Recommended Operating Conditions
Case Temperature Supply Voltage (VEE) 0C to +85C
-5.7V to -4.2V
-50 mA 2000V
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
DC Electrical Characteristics (Note 3)
VEE = -4.2V to -5.7V, VCC = VCCA = GND, TC = 0C to +85C Symbol VIH VIL VOH VOHC VOLZ IIL IIH IEE Parameter Input HIGH Voltage Input LOW Voltage Output HIGH Voltage Output HIGH Voltage Cut-Off LOW Voltage Input LOW Current Input HIGH Current Power Supply Current -121 -91 0.50 240 -57 Min -1165 -1830 -1025 -1035 -1950 -955 Typ Max -870 -1475 -870 Units mV mV mV mV mV A A mA Conditions Guaranteed High Signal for ALL Inputs Guaranteed Low Signal for ALL Inputs VIN = VIH (max) or VIL (min) Loading with 25 to -2.0V VIN = VIH (min) or VIL (max) Loading with 25 to -2.0V VIN = VIH (min) or VIL (max) Loading with 25 to -2.0V VIN = VIL (min) VIN = VIH (max) Inputs Open
Note 3: The specified limits represent "worst case" values for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
DIP AC Electrical Characteristics (Note 4)
VEE = -4.2V to -5.7V, VCC = VCCA = GND Symbol tPZH tPHZ tPZH tPHZ tPZH tPHZ tTZH tTHZ Parameter Propagation Delay Data to Output Propagation Delay Dual Enable to Output Propagation Delay Common Enable to Output Transition Time 20% to 80%, 80% to 20% TC = 0C Min 1.90 1.30 1.90 1.60 1.80 1.50 0.50 0.35 Max 3.60 2.70 3.60 3.00 3.50 2.90 1.80 1.40 TC = +25C Min 1.90 1.30 1.90 1.60 1.80 1.50 0.50 0.35 Max 3.60 2.70 3.60 3.00 3.50 2.90 1.80 1.40 TC = +85C Min 2.00 1.50 2.00 1.70 2.00 1.60 0.50 0.35 Max 3.80 2.70 3.90 3.40 3.80 3.00 1.80 1.40 Units ns ns Figures 1, 2 ns ns Conditions
Note 4: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
PLCC AC Electrical Characteristics (Note 5)
VEE = -4.2V to -5.7V, VCC = VCCA = GND Symbol tPZH tPHZ tPZH tPHZ tPZH tPHZ tTZH tTHZ Parameter Propagation Delay Data to Output Propagation Delay Dual Enable to Output Propagation Delay Common Enable to Output Transition Time 20% to 80%, 80% to 20% TC = 0C Min 1.90 1.30 1.90 1.60 1.80 1.50 0.50 0.35 Max 3.40 2.50 3.40 2.80 3.30 2.70 1.70 1.30 TC = +25C Min 1.90 1.30 1.90 1.60 1.80 1.50 0.50 0.35 Max 3.40 2.50 3.40 2.80 3.30 2.70 1.70 1.20 TC = +85C Min 2.00 1.50 2.00 1.70 2.00 1.60 0.50 0.35 Max 3.60 2.70 3.70 3.00 3.60 2.80 1.70 1.30 ns ns Figures 1, 2 ns ns Units Conditions
Note 5: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
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100323
Test Circuitry
Note: * * * * * * * VCC, VCCA = +2V, VEE = -2.5V L1 and L2 = equal length 50 impedance lines RT = 50 terminator internal to scope Decoupling 0.1 F from GND to VCC and VEE All unused outputs are loaded with 25 to GND CL = Fixture and stray capacitance 3 pF Pin numbers shown are for flatpak; for DIP see logic symbol
FIGURE 1. AC Test Circuit
Timing Waveform
FIGURE 2. Propagation Delay and Transition Times
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100323
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide Package Number N24E
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100323 Low Power Hex Bus Driver
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 6 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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